Heretofore, it has been customary to connect a decoupling circuit between an IC and a power source in parallel relation to the IC so that, out of power source current, an alternating current component is diverted by the decoupling circuit to supply only a direct current component to the IC. Such a function of the decoupling circuit can be attained by decreasing the impedance of the decoupling circuit below a predetermined value over a wide band of frequencies ranging from low frequencies to high frequencies. In general, the decoupling circuit is composed of a plurality of capacitors. Since the capacitor has, in addition to an electrostatic capacitance, an equivalent series inductance (hereafter referred to as “ESL”), it follows that the impedance is low only in a band of frequencies close to a self-resonant frequency yielded by the ESL and the electrostatic capacitance. Therefore, the decoupling circuit has usually been constructed by arranging a plurality of capacitors having different self-resonant frequencies in parallel with each other. A reduction in the circuitry size of the decoupling circuit cannot be achieved without reducing the number of constituent capacitors. To that end it is preferable to employ a capacitor which allows attainment of a wide frequency band with low impedance on its own. For example, a multilayer capacitor has hitherto been preferably used for a decoupling circuit.
FIG. 4 is a perspective view showing the external appearance of one example of a conventional multilayer capacitor. For example, as disclosed in Japanese Unexamined Patent Publication JP-A 2004-296940, there is known a multilayer capacitor 40, as one that has conventionally been used for a decoupling circuit, which includes: a multilayer body 41 of rectangular parallelepiped shape constructed by stacking a plurality of rectangular dielectric layers 42 on top of one another in a stacking direction; a first internal electrode and a second internal electrode (not shown), disposed in a plural number, arranged in an alternating manner so as to be opposed to each other, with the dielectric layer 42 interposed therebetween inside the multilayer body 41; and a first external electrode 45 and a second external electrode 46 for establishing electrical connection between the first internal electrodes, as well as between the second internal electrodes, which are so formed as to extend from a left-hand surface and a right-hand surface, respectively, of the multilayer body 41 that are perpendicular to the stacking direction and a direction parallel with a longitudinal direction of the dielectric layer 42, along the stacking direction, over both of an upper surface and a lower surface of the multilayer body 41 that are perpendicular to the stacking direction and a direction parallel with a width direction perpendicular to the longitudinal direction of the dielectric layer 42. In this construction, one of the upper surface and the lower surface of the multilayer body 41 serves as a mounting surface.
In the multilayer capacitor 40 thus constructed, a plurality of electrostatic capacitances, each of which is formed between the first internal electrode and the second internal electrode, are arranged in parallel with one another to thereby obtain higher electrostatic capacitance. Moreover, by designing the upper and lower surfaces of the multilayer body 41 as a mounting surface, it is possible to shorten a path over which an electric current flows in each of the first internal electrode and the second internal electrode, and thereby lower the level of ESL. In the meantime, it is known that the impedance of the capacitor becomes the minimum at the self-resonant frequency, is substantially inversely proportional to the electrostatic capacitance at frequencies lower than the self-resonant frequency, and is substantially proportional to the ESL at frequencies higher than the self-resonant frequency. With consideration given to these facts, in the multilayer capacitor 40, in the presence of high electrostatic capacitance and low ESL, the impedance can be kept low over a wide band of frequencies, from a range of frequencies lower than the self-resonant frequency to a range of frequencies higher than the self-resonant frequency. It will thus be seen that the multilayer capacitor 40 allows attainment of a wide frequency band with low impedance on its own. Accordingly, it can be said that the multilayer capacitor 40 is suitably adopted for use in a decoupling circuit.
In the conventional multilayer capacitor 40 thus far described, however, since the electric current flow path is shortened to lower the level of ESL, it follows that the level of an equivalent series resistance (hereafter referred to as “ESR”) is lowered. In this case, the impedance at frequencies close to the self-resonant frequency is unduly low. FIG. 5 is a chart showing impedance characteristics as observed in a decoupling circuit. In the chart, the abscissa axis represents frequency (unit: MHz) and the ordinate axis represents impedance |Z| (unit: Ω). A characteristic curve x and a characteristic curve y each indicated by a broken line in the chart represent the impedance characteristics of two different capacitors, respectively, for constituting the decoupling circuit. A characteristic curve z indicated by a solid line represents the impedance characteristic of the decoupling circuit. As shown in FIG. 5, in a case where a plurality of such multilayer capacitors 40 are used in the decoupling circuit, the impedance characteristic of the decoupling circuit becomes such that the impedance is unduly high at frequencies close to an antiresonant frequency r formed by the two capacitors that are close in self-resonant frequency to each other. In such a decoupling circuit, the impedance is caused to vary significantly according to frequency. Therefore, depending upon frequency, there arises the problem that the decoupling circuit is incapable of diverting an alternating current component of power source current.
In order to solve such a problem, it will be necessary to exercise ESR control in such a manner as to prevent the level of ESR from becoming too low in a capacitor designed for use in a decoupling circuit. However, if the level of ESR is raised simply by lengthening the electric current path, there will arise the problem that the level of ESL is also raised. In the alternative, the ESR level can be raised simply by making the electric current path narrower. However, even if this method is adopted, the problem of high ESL level still exists. For example, in the conventional multilayer capacitor 40 described above, if the interval between the first external electrode 45 and the second external electrode 46 is increased to lengthen the path over which an electric current flows in each of the first internal electrode and the second internal electrode, although the ESR level can be raised, the ESL level will inevitably become high at the same time.